1. Field of the Invention
The present invention relates to reducing power consumption and more particularly to electrically isolating idle or non-used devices to save power.
2. Description of the Prior Art
An important objective of battery-powered systems and products is to prolong the life of the battery. This provides many advantages including, lower operating costs because of the reduced frequency of changing batteries, more stable and reliable operation and an edge over competition in the marketplace.
An example where reducing power consumption is critical is a battery-powered portable computer designed for military applications. Battery life is crucial because of the above reasons. A typical computer includes interfacing capability to enable the computer to communicate with many devices and other computers. In any given application, many functions and devices of the computer are sitting idle simply because the application does not use them. In other cases, the uses of some functions will be so sporadic that the hardware implementing those functions will remain inactive for long periods of time. To reduce power consumption, there is a need for a system that can shut off power to idle devices and integrated circuits without impacting the active circuitry.
The prior art addressed the above problem by removing either the power connection or the ground connection or both connections of the idle devices. The problem with these techniques is that the signal pins of the idle devices are still connected to the rest of the circuitry and D.C. current paths remain active through those pins, thereby dissipating valuable energy. Also, in CMOS chips, a latch-up problem can occur by having the power and ground pins in indeterminate states.
A traditional way of reducing power dissipation in clocked CMOS devices is through lowering the clock rate of the chip since the operating frequency is directly proportional to power consumption. Many systems however, do not include clocked CMOS devices that can be targeted for the power down mode of operation.